Logic BIST

Logic built-in self-test (LBIST) embeds pattern generation and response evaluation directly on-chip so that scan-based structural test can run with little or no tester involvement, using pseudo-random patterns generated by a linear feedback shift register (LFSR) or similar pseudo-random pattern generator (PRPG) instead of ATPG-derived deterministic vectors. Captured responses are compacted, typically by a multiple-input signature register (MISR), into a single signature that is compared against a known-good golden signature; any mismatch indicates a failure without needing to store or compare full response vectors.

Because purely pseudo-random patterns generally cannot achieve the fault coverage of deterministic ATPG (certain faults are "random-pattern-resistant" due to circuit structure), production LBIST flows commonly use weighted random patterns or test point insertion, where additional observation and control points are added to the netlist specifically to make hard-to-test nodes more responsive to random patterns. Some architectures supplement on-chip pseudo-random patterns with a small set of top-up deterministic patterns stored on-chip or loaded via scan to close coverage gaps efficiently. LBIST controllers manage the overall sequence: configuring scan chains, running shift/capture cycles with the PRPG and MISR active, and reporting pass/fail status, often through a JTAG or IEEE 1500 interface.

LBIST is especially valuable for in-system and periodic self-test in safety-critical applications (automotive ISO 26262, where it contributes to meeting required diagnostic coverage targets for ASIL ratings), since it can run at power-up, during idle periods, or periodically during operation without external test equipment. It is also used during burn-in and at wafer sort/final test to reduce dependency on expensive ATE channels for high pattern-count stuck-at and transition coverage. Key design considerations include managing clock domains during self-test (often requiring all clocks to run synchronously or be gated into a common test clock), handling X-sources that would corrupt the MISR signature, and ensuring the LBIST hardware itself is adequately tested as part of the overall DFT architecture.

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